Editor's Note: I've long been impressed by Xcell Journal from Xilinx, both for the quality of its production and the quality of its articles. A few weeks ago we looked at an article on Replacing ...

The development boards for these FPGA's are costly and, sadly, a little fumbling around could easily claim it's life, so, the purpose of this project is to create a board that can buffer the I/O pins ...

The latest version of Xilinx’s PlanAhead hierarchical FPGA design and analysis software sports support for the company’s 65-nm Virtex-5 and Spartan-3 devices. Used with the Xilinx Integrated Software ...

Controlled by a commercial, industrial, or automotive-grade Xilinx Artix-7 FPGA, the EMC 2-7A I/O board from Sundance integrates a PCI Express x4 Gen2 interface and reprogrammable logic on a PC/104 ...

FPGAs can contain millions of logic gates yet every FPGA, regardless of the complexity of its internal design, must communicate with external devices through its I/O pins. Although this statement is ...

There are easy ways of getting more I/O pins for any project; shift registers, I2C expanders, or ADCs will give you plenty of pins for whatever project you have in mind. All these require extra ...

Electronic Design held a series of Q&A sessions with several major FPGA companies. Here, our roundtable discussion with Lattice Semiconductor included Bertrand Leigh, director of applications ...