This project implements an enhanced 8-bit SAP-1 computer in Logisim Evolution with hardwired control and an extended instruction set (LDA, LDB, ADD, SUB, STA, JMP, HLT). It supports Automatic Mode ...
This project implements a custom 4-bit CPU with a pipelined architecture and a minimal instruction set. The CPU was designed entirely in Logisim, with subcircuits representing the control unit, the ...
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